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Problem Reporting Guide
Problem Reporting Guide
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Issue Date and Description


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iLab NameC - Xactix E1 Xenon Difluoride (XeF2) Etcher
iLab KioskBRK Etch Core
FICShared
OwnerFrancis Manfred
LocationCleanroom - S Bay
Max. Wafer4"/100 mm
Internal Page/wiki/spaces/BNCWiki/pages/6236532
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Overview

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TypeMaterialsRestricted MaterialsAvailable GasesMax RF PowerWafer Size
Vapor-Phase EtchSi, Mo, Ge, SiGe, W
XeF2, N2NA4 inch (100 mm) SEMI Specification


Note: Some literature mentions XeF2 etching of Ti, TiN, Ta, TaN, and TiW. Etching of these materials is temperature dependent, negligible etching occurs below 50 degrees C for any of these materials. Our system does not have heated chuck capability and is not suitable to etch these materials.

General Description

At room temperature and atmospheric pressure Xenon Difluroide (XeF2) is a white solid material.  It sublimates directly into the required vapor-phase etchant, not requiring plasma or other activation, under vacuum at room temperature and about 4 Torr pressure.  XeF2 etch is a dry, isotropic, etch desirable for many MEMS release applications.  Not needing plasma activation minimizes damage to other materials on the wafer and offers broad flexibility in process design. The XeF2-Si reaction is exothermic and the process engineer should be mindful of potential thermal issues. 

For silicon, the etch proceeds as:
2XeF2 + Si => 2Xe + SiF4


Commonly Etched Materials
MaterialSelectivity to Si

Si

1:1
Mo2:1
GeSame or Faster than Si
SiGeSame or Faster than Si


Note

Etch rates depend on the amount of exposed silicon, and will depend on a particular sample.


Commonly Used Low or Non Reacting Materials
MaterialSelectivity to Si

Thermal SiO2

1000:1
Low Temperature SiO21000:1
Si3N4>1000:1
GoldLow Amount of Attack Under Certain Conditions
CopperLow Amount of Attack Under Certain Conditions

SiC

Low Amount of Attack Under Certain Conditions
Non Reactive Materials
MetalsCompounds
AlPZT
NiMgO
CrZnO
PtAlN
GaGaAs
Polymers and Organics
Photo ResistsPDMS
C4F8Silica Glass
Dicing TapePP
PENPET
ETFEAcrylic


Sample Requirements and Preparation

The Xactix E1 Xenon Difluoride etcher will accept small clean and dry pieces up to full 100 mm (4 inch) diameter wafers.  Small pieces can be placed directly on the sample surface with no mounting required.

XeF2 etching is a chemical diffusion process, as such, the etch rate and etch profiles are dependent on loading effects. Any silicon that you do not intend to etch should be covered to prevent consumption of XeF2 resulting in etch process variation. A test run with the exact same sample size and pattern is required to determine specific etch rate for a process.  The following effects have been observed:

  1. Etch rate differences can be observed between the center and the edge for wafers with large etched areas.
  2. Exposed silicon at the edge of the wafer can consume XeF2 and lead to more etch rate non-uniformity.  This can be from photoresist edge bead removal or simply form loss of photoresist on the vertical edge of the wafer. 
  3. Patterns with differences in feature sizes can show different etch rates depending on the feature size or to the proximity of two adjacent features.


Note

The surface preparation prior to etch is important in achieving smooth etch surfaces.  Note that the etched sidewalls and bottom surfaces may show 1 – 2 μm roughness.

  1. Etch roughness occurs through a mechanism similar to micromasking resulting in irregular etch fronts.  XeF2 etches native silicon dioxide, but at a much lower rate than silicon, any surface contamination or variation in removal of the native oxide can lead to surface roughness. For well controlled silicon etching, samples are dipped into a BOE solution for 10 s to remove any native oxide prior to the XeF2 etch,
  2. All samples need to be dehydrated directly before placement in the etch chamber, either with IPA or a hotplate dehydration bake at 120" C for 10 min. The presence of adsorbed water on samples will result in the formation of both gaseous HF and a silicon flouride polymer on the sample surface. This polymer layer will reduce or completely stop etch progression, and will not be removed in either solvent soaks or O2 plasma.

The XeF2-Si reaction is exothermic and will heat the wafer.  A delay step can be used to cool the wafer between etch cycles to mitigate any observed thermal issues. 


Standard Operating Procedure


Warning

XeF2, SiF4 and any other F-containing species present in this etching process are both toxic and corrosive. Inhaling them can result in chemical burns to respiratory tracts. 


Running a Process

Logging on the System


 Loading a Sample

Running a Recipe


Changing the Number of Cycles During an Etch

Unloading a Sample


Viewing Detailed Etch Information
Finishing

Creating or Changing a Recipe

Etch Recipe Parameters



In general better results are obtained by etching in one run rather than several shorter runs where the sample is removed and then re-etched.

Questions & Troubleshooting

How long should my cycle time be?
Cycle time should be set to allow all of the XeF2 vapor to react with exposed silicon. For large areas of exposed silicon, XeF2 will quickly react with the exposed areas, and the cycle time may be reduced. For a smaller chip, cycle times will need to somewhat longer to allow all of the XeF2 to react fully.

In order to tell that all XeF2 has reacted, the chamber pressure may be monitored. The etching reaction proceeds as 2XeF2 + Si -> SiF4 + 2Xe, meaning 2 moles of reactant gas will be present at the beginning of the etch step, and 3 will be present after the etch has completed. Therefore, the pressure in the chamber will increase somewhat while the etch is proceeding, and will level off after the etch has completed.

The etch rate on my sample seems nonuniform?
Uniformity is an inherent issue with XeF2 etching. There is a limited amount of etchant released in each cycle, and the local etch rate will depend on the amount of exposed silicon and available XeF2 vapor. In general, large exposed areas of silicon will show the worst uniformity, and regular patterns of small holes (with the rest of the wafer covered) will show the best uniformity. Minimizing unneeded exposed silicon will allow for faster and more uniform etching of the pattern.

 

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