Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

...

...

...

...

...

...

    


Page Properties
idFunctionality

Insert excerpt
Problem Reporting Guide
Problem Reporting Guide
nopaneltrue

Status

...

UP

Issue Date and Description

...

RF2 ICP Supply output is bad.


Estimated Fix Date and Comment

...



Responding Staff

...



Insert excerpt
e-Log Link - PECVD & Thermal Annealing
e-Log Link - PECVD & Thermal Annealing
nopaneltrue

...

Plasma-Therm Apex SLR HDPCVD

...

iLab Name:

...

Plasma-Therm APEX SLR HDPCVD Deposition System
iLab Kiosk: BRK Growth Core
FIC: Shared
Owner: Rich Hosler
Location: Cleanroom - R Bay
Wafer Size: 4"/100 mm

Please inspect through the top window to see if any broken wafer bits are present before loading sample!


Only use recipes with "AR CLEAN" in the title on samples/wafers that are bare Silicon. The Argon clean process can etch structure and cause chamber contamination.


Info

...

Note on Carrier Wafers

Please note that carrier wafers should not have gouges, debris, broken parts, or excessive deposition stress.

...

Image Added

In this example the wafer became overstressed and slightly cracked, leaving debris in the chamber which caused damage to the ceramic plate when the cleaning wafer went in.

If you're unsure, send me a picture at hosler0@purdue.edu and I'

...

ll answer as quickly as possible.  



Table of Content Zone
locationtop
styledisc
Table of Contents
outlinetrue
indent25px
stylenone


Overview

General Description

Fab Forum HDPCVD Presentation.pptx

Specifications

The system has following process gases:

  1. 100% Silane (SiH4)

  2. N2

  3. Ar

  4. CH4 Methane

  5. O2

...

  1. SF6 Sulfur Hexaflouride

Configured for 4" substrates.

  • Bias Supply RF power: 600W @ 13.56MHz

  • ICP RF Power: 1kW @ 2MHz

  • Electrode temp range: 10-180°C ±3°C

Technology Overview 

Image Modified 

Sample Requirements and Preparation

  • All samples must be 4” wafers (bare or pocketed) or

...

  • use a 4" carrier wafer

  • Samples and wafers must be cleaned using the TAI (Toluene, Acetone, IPA) process followed by either Piranha or RCA cleaning as appropriate for sample compatibility.

Standard Operating Procedure

  • View file
    nameAPEX HDPCVD SOP_08_03_22.pdf

...


Process Library

Recipe

Precursors

Validated Substrates

Rate (Å/min)

RI (F40 measured)

Deposition Temp. Tested (°C)

Bias Power / ICP Power (W)

Pressure (mTorr)

SiO2

SiH­4 / O2 / Ar

Si and SiC

1000

1.46-1.50

170

25/900

8

SiNx

SiH4 / N2 / Ar

Si

1100

1.964-2.25

25-150

0/900

12.5

a:Si

SiH4 / N2 / Ar

Si

600

tbd

150

80/600

5

Chamber Etch

SF6 / O2 / Ar

Sapphire Wafer

70

n/a

178

10/1000 (750)

40


New Process Consultation: 

Plasma-Therm Technical Support (ask for process support)

E-mail: techsupport@plasmatherm.com
Phone: (800) 246-2592

References

References